Time

Speaker

Details

8.45

Arrival

Registration, badges and Refreshments

9.30

Mike Bartley

Welcome

9.35

Ian Phillips

ARM

Overview: Ian will give a context to subsequent Multicore discussions in and beyond this event by looking at 'Efficiency' in a context of increasingly Diminishing Returns. This will lead quite naturally to Multicore (CMP); its rationale and its role. But will also raise questions about the way(s) forward ... as technology moves out of the market driving seat.

Title: Despite the Law of Diminishing Returns

Abstract: Why does it take millions of transistors to realise the broadcast radio receiver done in five in the 70's? Why are there millions of lines of software in products that are not programmable? And why do we throw things away before they break? The last 40 years saw the exponential growth of silicon capacity and the technology lead markets that ensued. Complexity was never an obstacle whilst design cost was 2nd order, but now that limits are upon us it is also apparent that people buy products not technology ... so we strive to deliver elevated expectation despite Diminishing Returns.

Bio: My career in Electronics started in 1965 as an MOD Apprentice; my career in Design in 1975 when after Graduation I joined Pye TMC. Since, I 'Designed' this hugely dynamic domain for Philips, Plessey, GEC and Mitel; before joining ARM in 1998. Here my primary role is to nurture technical issues of strategic value, until they are quantified enough to become business programs. This brings me into wide contact with Research Groups, Government and EU departments and Funding Agencies as speaker, advisor and inquisitor. I am a Fellow of the IET and Visiting Prof. at Universities of Plymouth and Liverpool.

10.15

Simon McIntosh-Smith

Bristol University

Overview: An overview of the major languages and a discussion of one language in depth

Title: An overview of current parallel languages, and a deeper dive into OpenCL

Abstract: Processor designers are increasingly turning to parallelism as a way of turning transistors into performance. While high-end processors such as GPUs have been massively parallel for some time, this trend has now even reached the embedded SoCs within consumer electronics devices, with smartphone processors now sporting heterogeneous multi-core/many-core designs.

On-chip parallelism is increasing at an exponential rate in line with Moore's Law, and is presenting the biggest challenge and opportunity to software developers in a generation. New parallel programming models and languages are again in vogue as researchers seek new ways to aid the development of fast and correct massively parallel programs.

In this talk we shall review several of the recent developments in parallel programming approaches from high performance computing and embedded systems. Examples covered will include Nvidia's CUDA and Microsoft's recently announced C++ AMP. We will also include a deeper technical dive into the emerging open standard OpenCL.

Bio: McIntosh-Smith is Head of the Microelectronics research group at the University of Bristol. Prior to joining the university he spent fifteen years in the microelectronics industry, working as a microprocessor architect for Inmos, STMicroelectronics and the first GPGPU company, Pixelfusion, before co-founding ClearSpeed Technology in 2002 as Director of Architecture and Applications. He now focuses on parallel software and hardware for high performance computing, and sits on several national and international advisory bodies in these areas. He has chaired the international Many-core and Reconfigurable Supercomputing Conference (MRSC) since 2009 and is author of a paper titled "The GPU Computing Revolution: From Multi-Core CPUs To Many-Core Graphics Processors" A Knowledge Transfer Report recently published by the London Mathematical Society and the Knowledge Transfer Network for Industrial Mathematics.

11.00

Break

Refreshments

11.30

Message from our sponsor

Ian Osborne

Director, ICT KTN

11.35

Gordon Cameron

Mentor Graphics

Title: Is there a Silver Bullet for Multicore?

Abstract: Multicore systems are very diverse and therefore no single solution can apply in every case. This discussion will focus on the challenges and some of the methods and tools available today to assist system and software engineers through the various phases of design and validation.  It is not limited to just multi-core but will also look at multiple Operating Systems and OpenMCAPI (an open implementation of the MultiCore Communications API).

Bio: Gordon Cameron is Strategic Alliances Manager for the Embedded Systems Division of Mentor Graphics. He has over 30 years experience in the embedded industry covering both hardware and software disciplines. His experience spans the design of microprocessors in the late 70's and early 80's, through multi-processor system design and debug, to software design tools, simulation, Operating Systems and User Interfaces. Gordon gained a BA from the Open University in the UK.

12.30

Lunch

13.15

Two talks on the major tools that a multicore developer needs (give an overview considering compilers, profilers, debuggers, libraries) from companies creating such tools

Matt Fyles

XMOS

Title: Enabling real time applications for multicore with the XMOS development tools

Abstract: The development of multicore applications presents a significant challenge to developers and especially those unfamiliar with the complex task of managing and debugging issues related to multiple processors. Applications produced for XMOS microprocessors are designed from the ground up to take advantage of the multicore nature of the device. The XMOS development tools provide the user with a familiar environment to develop these applications and a set of advanced tools to allow debug and analysis of issues relating to multicore.

Bio: Matt Fyles is Project Lead for the Debug and Profiling tools at XMOS, a provider of event-driven multi-core processors. Matt joined XMOS in early 2008 and has 13 years experience in the semiconductor industry specializing in development tools and applications for parallel processor architectures. He has an honors degree in Computer Science from Exeter University.

Gajinder Panesar Picochip

Title: More than just chips

Abstract: There is a plethora of multicore architectures and systems available today. There are strengths and weaknesses in many of them and some are clearly evolutions of approaches that have been shown to work for their target markets. In order for customers to successfully deploy multicores in an embedded wireless market, they require more than just chips.

To this end Picochip devised the picoArrayTM , and in order for this to be used very

effectively to build commercial wireless systems, a design flow, toolset and silicon.

The talk will highlight some of the key aspects of the Picochip approach in particular

the deterministic internal communication fabric. The methods that have been developed for debugging and verifying systems using devices from the picoArray family are explained.

Bio: Gajinder Panesar is chief architect at Picochip Ltd in Bath.  He was previously a system architect at ClearSpeed and a consultant design engineer at Inmos and STMicroelectronics.  He has been a research fellow at the University of Southampton and started out as a design engineer at Acorn Computers in Cambridge.